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STP60N06
Part No
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938649
Part No
STP60N06
Manufacturer
IXYS
Parts specification
Quantity
5956
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2468454
Part No
STP60N06
Manufacturer
STM
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6323
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2469061
Part No
STP60N06-14
Manufacturer
STM
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6789
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2481556
Part No
STP60N06FI
Manufacturer
STM
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8704
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2481558
Part No
STP60N06-16
Manufacturer
STM
Parts specification
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8705
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2481559
Part No
STP60N06L-16
Manufacturer
STM
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8706
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2481567
Part No
STP60N06_14
Manufacturer
STM
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8712
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2481586
Part No
STP60N06-14P60N06-14
Manufacturer
STM
Parts specification
Quantity
8727
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2481592
Part No
STP60N06-18
Manufacturer
STM
Parts specification
Quantity
8732
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2490059
Part No
STP60N06FP
Manufacturer
STM
Parts specification
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7555
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2490068
Part No
STP60N06_16
Manufacturer
STM
Parts specification
Quantity
7562
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2492475
Part No
STP60N06-15
Manufacturer
STM
Parts specification
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5571
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XCZU2CG-1SBCVJ478E
Manufacturer
:
XILINX
Part No
:
XCZU2CG-1SBVA484E
Order Code
:
2760177
Product Range
:
Zynq UltraScale+ MPSoC Family
Series
:
MPSoC
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Product Overview
The Xilinx Zynq® UltraScale+™ MPSoC family provide 64bit processor scalability while combining real-time control with soft, hard engines for graphics, video, waveform and packet processing. Built on a common real-time processor and programmable logic equipped platform, 3 distinct variants include dual (CG), quad application processor and GPU (EG) and video codec (EV) devices, creating unlimited possibilities for 5G wireless, next generation ADAS, industrial IoT applications. The CG devices hasheterogeneous processing system comprised of dual-core Cortex™-A53, dual-core Cortex™-R5 real-timeprocessing unit.
- Zynq® UltraScale+™ MPSoCs are available in -3, -2, -1 speed grades
- Innovative ARM® + FPGA architecture for differentiation, analytics & control
- Extensive OS, middleware, stacks, accelerators and IP ecosystem
- Multiple levels of hardware and software security, architected to deliver low system power
- Integration delivering the de facto All Programmable platform
- Up to 5X system level performance per watt over Zynq®-7000 SoCs
- Industry leading design tools, C/C++, open CL design abstractions